As the first interconnection element after the semiconductor chip itself, IC packaging technologies are the primary gate keepers of electronic system performance. There are a myriad of different types of packages available, each normally targeted for a specific range of semiconductor devices. With so many options, understanding the basics of IC packaging – how they are constructed, what drives cost and what limits performance – is critical to the successful product design.

Some of the most common IC packages, from chip scale to BGA packages as well as some of the many 3D stacked and folded structures, will be reviewed and discussed. The instructor will also review wafer level packaging. Finally, a look at the future of IC packaging will be provided to stimulate thought on how to actively engage and direct the future of IC packaging.

What You Will Learn

• The important roles of IC packaging
• Construction and manufacturing processes for common IC packages
• Impact of IC package design on the assembly processes
• Testing strategies for IC packages
• Trends in the integration of IC, package and PCB substrate
• What's new and where IC packaging technology is headed
• Overview of IC packaging technologies and its role in electronics assembly
• Chip scale packaging types
• Reliability testing and electrical performance of CSPs
• Impact of lead free check points
• Standards for substrates
• The future of IC packaging

Who will Benefit
Design and electronic packaging engineers, project managers, purchasing managers, and others who influence future electronic packaging decisions in their companies should plan to attend. In addition, electronics industry suppliers of materials and processes who attend will better understand how to position their products as CSPs further press the limits of manufacturing technology.

Discussion Leader
The discussion leader will be Joseph Fjelstad, co–founder of SiliconPipe. Joe is a recognized authority in the field of electronic interconnections with more than 30 years of experience. He has written or authored several books on the subject of interconnections and writes monthly interconnection technology related columns for industry magazines. Fjelstad is also a prodigious inventor, having more than 150 U.S. patents either issued or pending. He is a recipient of the IPC Presidents Award and results of an industry poll indicate he is one the most influential persons in the electronics industry.

Registration Information
The registration fee for the all day workshop is $495 for IPC and $695 for non–members. The registration fee entitles participants to all course materials, refreshments and lunch. Class size is limited, so please register by January 10, 2007. To register for this workshop, complete the registration form and fax or mail as indicated.

For more information, or if the registration deadline has passed, contact the IPC registration department at 847–597–2861. IPC reserves the right to cancel the workshop as late as two weeks before the event due to low registration and is not liable for any costs the registrants incur because of any cancellation.

Location, Times and Hotel Accommodations
The workshop will be held at the La Quinta Inn Phoenix North, 2510 West Greenway Road, Phoenix, AZ 85023. Out–of–town guests, contact the La Quinta Inn Phoenix North, directly at 602–993–0800 or http://908.LQ.com . IPC has a special room rate of $99 (single/double) per night. When calling the hotel to make your reservation, please mention "IPC Group Block" to get the special rate.

The course will begin at 8:30 am (with onsite registration and sign–in beginning at 8 am) and conclude by 5:00 pm. http://www.ipc.org/calendar/2007/Advanced_Packaging_01.18.07/AdvancedPackaging0107.htm

Keywords : IPC, workshop, advanced packaging

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