Pac Tech Packaging Technologies, held their grand opening celebration for their new Pac Tech Asia facility on September 18. The new 55,000 square foot facility is located in Penang, Malaysia. In conjunction with the opening celebrations, Pac Tech also conducted an advanced packaging technical symposium on September 19.

The opening celebration was attended by the Chief Minister of Penang, a number of the local government officials, business leaders, engineers and managers from some of the worlds leading electronics companies.

The advanced packaging symposium included a full day of presentations on both business and technology trends within the packaging industry, including WLCSP, flip-chip, and 3D packaging. Over 200 people from around the world attended the symposium. Based on the success of this event, the second of what is hopped to be an annual symposium is being planned for next year. Next year the format will expand to include additional topics related to wafer-level packaging trends and applications.

The new facility is designed to encompass advanced production floor space, including cleanroom area. Both are equipped with the latest generation equipment for 300mm wafers. There is 55,000 square feet of state-of-the-art wafer bumping, electroless nickel and gold under bump metallization, wafer sawing, wafer thinning, die sorting and assembly equipment and backend processing capabilities for semiconductor companies within the Pacific Rim.

The new facility is designed and laid-out to accommodate prototyping and mass-production quantities up to 600,000 wafers per year. Pac Tech Asia will provide a variety of special applications designed to enhance and support the Asian semiconductor manufacturing community. The applications supported will include: electroless Ni/Au under-bump metallization for copper and aluminum devices, solder-paste stencil printing for flip-chips, solder-ball placement for wafer-level CSPs down to 200µm ball diameters, and micro solder-ball placement for fine-pitch applications down to 80µm. More advanced applications include: Ni/Pd/Au metalization for today’s power MOSFET devices and gold wire bonding, tall Ni/Au bumping for RFID applications. The facility offers up to 300mm wafer processing capability.

The facility is now accepting process qualification orders. Semiconductor companies can begin obtain more information by contacting: Pac Tech Asia (+60 4 644 103, Pac Tech GmbH (+49 3321 4495-620) or Pac Tech USA (+1 408 588-1925 ext. 212). Company’s can submit their wafer forecasts in order to begin allocation of time and schedule them into the production planning. Pac Tech GmbH and Pac Tech USA can also be contacted to begin the pre-qualification of processes to be used in the new Asian facility.

“Our new Asian facility provides is a showcase of the most cost-effective source of wafer bumping and backend processing in the world.” Comments Dr. Elke Zakel, President and CEO of Pac Tech GmbH.

Dr. Thorsten Teutsch, President of Pac Tech USA and Vice President of Operations for Pac Tech Asia, comments, “The new facility in Malaysia truly establishes Pac Tech as a global supplier of equipment and services.”

About Pac Tech
Pac Tech, Packaging Technologies, founded 1995 with facilities in Santa Clara, California, Nauen, Germany, and now in Penang, Malaysia is a world-leader in low-cost wafer bumping processes specializing in electroless nickel under-bump metallization. Pac Tech also designs and manufactures advanced packaging equipment for electroless nickel under-bump metallization and solder-jetting using laser heating. Since its inception, Pac Tech has received more than 50 patents for products developed in areas relating to wafer bumping, flip-chip and chip-scale packaging, and laser-bonding technology. Its website is www.pactech.com.

Keywords : Industry News, World, Pac Tech held Grand Opening Celebration for their New Asian Facility

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