Abstract
Do you know what level of applied strain your printed circuit board assembly realizes in your fielded state? This article looks at one case study of failed hardware and the underlying failure mechanisms of temperature cycling. All testing was performed by the STI Electronics Analytical Lab on customer-failed hardware.

Introduction
Strain gage testing has been around for years. It has been used on specific applications to understand the applied strain and strain rates applied to printed circuit board assemblies from environmental forces during its working life. Today a renewed interest is stirring among component manufacturers, OEMs, and contract electronic manufacturers due to the increased use of BGAs, micro BGAs, and chip scale packages, as well as small form factor packaged components. The use of more lead-free alloys opens these finished assemblies up to fracturing due to CTE (coefficient of thermal expansion) fatigue and strain forces. Lead-free solder alloys are less ductile than 63/37 leaded solder alloys. These types of packaging formats with their reduced rigid solder interconnects are now susceptible to applied strain at these interfaces to the printed circuit card pads as well as to the component interface. Micro-fracturing of the solder interconnect to the pad is the catastrophic failure. These defects are now common due to the density and shrink factor of these types of packages and the reduction in interconnect material volume. 

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Keywords : Strain Gage, Microstrain Levels, Strain Rates, Strain Pathways, and Micro Fracturing

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