Adequate reliability of surface mount solder attachments can only be assured with a 'Design for Reliability' based on solder joint behaviour and the underlying fatigue damage mechanisms. The consistency of the processing and the quality of the resulting electronic assemblies, while of course necessary, are not sufficient for reliability. Reliability design needs to consider the field use environment, the product design life, as well as the acceptable failure risk level. The complex nature of the interacting mechanisms underlying thermally induced solder joint fatigue combined with the highly temperature-, time- and stress-dependent behaviour of solder will be explored.

In this course the issues of quality, manufacturability, and reliability are put into context; the nature of the reliability hazard and the pertinent design parameters and material properties are examined; a solder fatigue model is developed based on experimental results; an acceleration model to extrapolate the results from accelerated reliability tests to reliability predictions for the service environment is derived; accelerated fatigue testing to establish proper reliability data bases is discussed in the context of highly accurate low-acceleration and less accurate high-acceleration tests; electronic product use categories of different environmental severity are defined and appropriate accelerated testing regimens are suggested; the manifestation of solder joint failure and its effect on electrical functionality are experimentally demonstrated using a severely fatigued test board from the IEEE Compliant Lead Task Force program.

The reliability information underlying the industry documents such as IPC-9701 "SMT Solder Joint Reliability Qualification and Performance Standard," IPC-SM-785 "Guidelines for Accelerated Reliability Testing of Surface Mount Solder Attachments," IPC-D-279 "Design Guidelines for Reliable Surface Mount Technology Printed Board Assemblies," and ANSI/IPC J-STD-013 "Implementation of Ball Grid Array and Other High Density Technology," will be discussed in detail.

LGA and QFN have fast become a common package type often used in many professional portable products. With any new device type there is always a learning curve for design, process and quality engineers who have to get to grips with the challenges that these packages bring. Each step of the implementation process for LGA/QFN devices will be reviewed along with results of practice process trials with these devices. Included with this workshop will be a set of optical and x-ray inspection charts for each delegate to use in manufacture. The workshop presenter is well known for his practical workshops and supported by Bob Willis unique process video experiments LGA/QFN are guaranteed to come alive.

Who should attend?
This workshop is designed for design, process and quality engineers responsible for introducing products containing LGA/QFN. Much of the material presented is extremely visual and practical making it ideal for manufacturing staff, like all the instructors workshops it not just theory, it’s a “How to Do It Session”

Workshop topics:
Component Package Types, Component Construction, MSD Handling Levels, Solderability Testing Packages, Printed Board Layout on Rigid and Flexible Circuits, Solder Mask Layout Options, Lead-Free Stencil Printing Options, Placement and Component Packaging, Convection and Vapour Phase Soldering Yields, Visual Inspection Criteria, X-ray inspection Criteria, LGA/QFN Rework and Replacement, Array Solder Joint Reliability, Common Process Problems with LGA/QFN.

Each delegate will receive solder joint inspection criteria wall charts for LGA/QFN and the opportunity of winning a copy of a new CD ROM covering Design, Assembly and Rework of LGA/QFN Packages.

Adequate reliability of surface mount solder attachments can only be assured with a 'Design for Reliability' based on solder joint behavior and the underlying fatigue damage mechanisms. The consistency of the processing and the quality of the resulting electronic assemblies is, of course, also necessary to assure reliability.

In this course the issues of quality, manufacturability, and reliability are put into context; failure mode analyses to gain an understanding of the responsible damage mechanisms and to take preventative design measures are explained and demonstrated on hand of numerous photos, illustrations, and cross-sections of solder joints failed in both field operation and during accelerated reliability testing; the manifestation of solder joint failures and their effects on electrical functionality are experimentally demonstrated using a severely fatigued test board from the IEEE Compliant Lead Task Force program using an Event Detector.

The basic differences between creep-fatigue-based solder joint failures and brittle fractures due to interfacial problems are illustrated and explained; this includes the so-called 'Black Pad' problems with ENIG metallizations.
The attendees of the course will be able to determine the root cause(s) and damage mechanism(s) underlying the solder joint failures of these packages and optimize the assembly design and assembly processes to achieve adequate reliability for their electronic assemblies.

This workshop covers the dynamics of both wave and reflow soldering (including video clips showing process issues), and time saving temperature profiling using thermal modelling complemented by measurement; The workshop concludes with an overview of PCB inspection as the main tool for process optimization along the electronics production line.

Wave Soldering
Step 1: THT & SMT double side mixed assembly
Step 2: Four layer PCB, SIR test added for flux qualification, single step wave solder process
Step 3: Combination of reflow and wave soldering;
Step 4: Solderability tests on various PCB finishes (Sn, Ag, NiAu, OSP, LF-HASL) comparing SnPb with SAC solder alloy

Reflow Soldering
Establishing a solder profile: Balancing solder heat demand and solder heat resistance
Requirements and limitations from PCB, components, and flux
Heat transfer values depending on media and oven characteristics
Practice of thermocouple temperature measurement
Offline temperature profile modelling to reduce set-up time.

Workmanship, Inspection
Inspection is a viable non-destructive qualification
Defect catalogues and examples from the shop floor
Requirements on component orientation and pad layout; lead-free and SnPb solder joints in comparison
Entering AOI = Automatic Optical Inspection
Defect classification, acceptance, target conditions and process indicator as presented by IPC-A-610D