The global assembly journal for SMT and advanced packaging professionals

Wafer level packaging and the third dimension

Depending on how liberal one is in their definition of what a wafer level package is, the technology is either entering its second, third or perhaps even its fourth or fifth decade of use. This is because of IBM’s early flip chip efforts, which go back to the 1960s, are virtually indistinguishable from many devices that now claim to be wafer level packages. The more recent date can be reasonably well marked by the work performed at the company M-Pulse (later re-christened Chip Scale, Inc) in San Jose, CA, in the 1989–1990 time frame, where and when wafer level packaging was a defined objective for the creation of small discrete active devices such as diodes and other few I/O components.

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