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Special Topics: Advanced packaging
Articles & Papers
Pushing the barriers of wafer level device integration
Tuesday, July 8, 2008Techsearch has predicted a compound annual growth rate of more than 24% for wafer-level packages between 2005 and 2010. Contract electronics manufacturers and original design manufacturers face a range of handling problems when using these small silicon devices in assemblies.

White paper: Bumping BGAs using solder paste printing process for RFI shields packaging
Friday, January 26, 2007One manufacturing process used to attach RFI shields for medical applications/cellular phone circuit board assemblies consists of "snapping" the shell-like shields onto solder spheres that are soldered to printed circuit board [PCB] pads.
7.2 – Evaluation of wafer bumping stencils
Wednesday, March 7, 2007In order to better characterize the performance of wafer bumping stencils, a novel solder transfer ratio has been defined that relates the amount of solder paste volume transferred to a wafer to the actual stencil aperture volume.

Cost reduction of wafer level packaging
Monday, August 17, 2009Solid state imagers are being incorporated in an ever-expanding diversity of products.

Wafer–level cavity package with via–through pad interconnects
Monday, June 16, 2008The continued drive toward solid state imagers with greater pixel numbers and smaller pixels adversely affects yields, particularly through physical contamination during assembly of the camera module.
Metal–based wafer level packaging
Monday, August 17, 2009Metal based wafer bonding for WLP has several advantages, including enhanced hermeticity, and it facilitates vertical integration.

Molded underfill process for the SiP
Friday, January 9, 2009For our application and experiment, a new underfilling process, molded underfill (MUF), is being investigated.

Wafer-level solder sphere placement and its implications
Friday, August 6, 2010There are three main packaging technologies used by the semiconductor industry today to create solder bumps on wafers: paste printing, electroplating, or sphere dropping.
Integrated testing, modeling and failure analysis of CSPnl for board level reliability
Friday, July 9, 2010The wafer level chip scale package (WLCSP) is gaining popularity for its performance and for its ability to meet miniaturization requirements of certain electronic products, especially handheld devices like cell phones.
 
Videos
PACTECH at NEPCON CHINA 2012
Pac Tech - Packaging Technologies is a worldwide leader in both Wafer Level Bumping & Packaging Services and in Advanced Packaging Equipment Manufacturing. Pac Tech has over 15 years of experience in the industry and has manufacturing sites all around the world, including: Germany, United States, Japan, and Malaysia. These sites can supply both engineering and prototyping services, as well as high volume production. For more information, please visit: www.pactech.de
Interview: Poornima Shenoy, president of the India Semiconductor Association
Debasish Choudhury interviews Poornima Shenoy, president of the India Semiconductor Association (ISA)
GPD GLOBAL at APEX IPC Expo 2012
GPD demonstrated at the APEX IPC Expo 2012 in San Diego, the PCD and MicroDot technologies on its MAX Series platform. MAX Series dispensing systems offer high accuracy, precision dispensing over a wide range of applications. The MAX Series platforms are ideal for die attach, underfill, MEMS, micro-volume conductive adhesive and paste applications. Max Series equipped with Micro-volume technology enables dispensing for 0201 components as well as die attach adhesives. Further expanding the Max Series capabilities with the continuously volumetric PCD dispense pump yields outstanding results with underfills, encapsulation and LED applications. For more Information, please visit: www.gpd-global.com Video Editor: Elisangela Dahlke
Juki at APEX 2009
Juki president Bob Black talks about the new equipment Juki brought to IPC APEX Expo 2009: the JX-100 15,000 pph entry-level placement machine, an upgraded 2080 fine pitch placer, the highest speed soldering machine on the market, and their new flexible, entry-level W510 soldering machine.
Bergen Systems Pvt Ltd at COMPONEX NEPCON India 2009
Pradeep Kaura of Bergen Systems Pvt Ltd introduces a new placement system and in-circuit tester.
MIRTEC at SMT/HYBRID/PACKAGING 2010
David Bennett, managing director of MIRTEC Europe, shows off the MS-11 high speed inline solder paste inspection system and the MV-7XI with the award-winning integrated Intelli-Scan laser inspection system for detecting lifted leads and coplanarity.
Milara at IPC APEX Expo 2011
Stephen Brodeur introduces the fully inline Milara TouchPrint stencil printer series, which is now in full release. It features the fully integrated CyberOptics SE500 post-print inspection technology and Asymtek dot dispensing option.
Nordson Asymtek at IPC APEX Expo 2013
Trevor Galbraith interviews Dan W. Ashley, Market Specialist Printed Circuit Board Assembly of Nordson Asymtek at Apex Expo 2013
Valor at IPC APEX Expo 2010
Julian Coates from the Valor division of Mentor Graphics introduces their complete factory-level control system.
From our Columnists
Wafer level packaging and the third dimension
Tuesday, September 23, 2008

Depending on how liberal one is in their definition of what a wafer level package is, the technology is either entering its second, third or perhaps even its fourth or fifth decade of use.

IC packaging technology retrospective
Monday, March 2, 2009All IC packaging technology structures since the invention of the integrated circuit itself have been tasked to perform, at a minimum, the simple and fundamental tasks of interconnecting and protecting the semiconductor die and making it useful for interconnection at the next level.

7.7 – IC packaging
Thursday, August 16, 2007While the glamour of the integrated circuit has diminished little over the nearly five decades of its existence, it has become increasingly clear in the last several years that the performance of semiconductor chips is being gated by the IC package.

PiP, PoP and PuP
Monday, April 6, 2009Since the beginning, all IC packages have been designed to perform the basic tasks of interconnecting and protecting the semiconductor die and making it useful for interconnection at the next level.

6.2 – Standards for IC packages: blessing or burden?
Wednesday, February 1, 2006Since shortly after the introduction of the first ICs there has been an effort to put in place standards for IC packages.
Is a standard lead pitch for components possible?
Tuesday, July 3, 2012IC packaging technology has led the march of progress since the earliest days of the electronics industry. Decisions made by those responsible for packaging integrated circuits have a ripple effect that extends to the rest of the electronics industry.

3d: Benefits and challenges
Thursday, September 26, 2013While a substantial amount of electronic interconnection has been performed in the 3rd dimension throughout the history of electronics, the pursuit of 3D interconnections at chip level is relatively new, even though some prescient inventors in the earliest days of the semiconductor industry foresaw its potential benefit.

Read more

Microelectronics Assembly and Packaging (MAP) workshop 2008 review
Monday, February 9, 2009The 8th International workshop on microelectronics assembly and packaging technologies was held in late November of last year and continues to be one of the best-kept open secrets of the IC packaging industry.

7.8 – IC packaging and interconnection technologies’ 4th dimension challenge
Tuesday, September 4, 2007Over the course of the last five or six years there has been an explosion of innovation in the realm of IC packaging.

 
 
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Latest Products
PARMI announces new SPI defect repair feature for SIGMA X
Friday, August 29, 2014PARMI, a leader in 3-D solder paste inspection (SPI) of printed circuit boards announces the Jet Solder Jet Dispenser Unit for its award-winning SIGMA X SPI Series. Jet repairs solder paste deposits within the machine to eliminate expensive rework and scrap, maximizes throughput and increases ROI.
New Vishay intertechnology 3 A synchronous buck regulator delivers design simplicity and space savings
Wednesday, August 27, 2014Vishay Intertechnology, Inc. (NYSE: VSH) expanded its microBUCK® family of integrated synchronous buck regulators with a new 3 A device offering a fixed 650 kHz switching frequency and a wide input voltage range of 4.5 V to 15 V. The Vishay Siliconix SiP12116 combines high-side and low-side n-channel MOSFETs with current-mode, constant on-time (CM-COT) control in the space-saving 3 mm by 3 mm DFN10 package with thermal pad, providing designers with a complete buck regulator design in only 100 mm².
Triple output 28VIN step-down µModule regulator with integrated heatsink delivers 70W in 4.5cm²
Wednesday, August 27, 2014Linear Technology Corporation introduces the LTM4634, a triple output step-down µModule® (micromodule) regulator in a 15mm x 15mm x 5.01mm BGA package with integrated heat sink. The thermally efficient package enables the LTM4634 to deliver full current on all three outputs (5A, 5A, and 4A), more than 70W of output power at 65°C ambient with 200LFM airflow.
Nordson MARCH introduces the FlexTRAK-S Plasma System with large capacity plasma chamber for advanced semiconductor and electronics packaging
Tuesday, August 26, 2014Nordson MARCH, a Nordson® company (NASDAQ: NDSN) and global leader in plasma processing technology, extends its line of TRAK™ technology products with the FlexTRAK-S™ large-capacity plasma system for advanced semiconductor and electronic packaging. The 5.5-liter plasma chamber has a high-power RF generator and better vacuum conductance so the FlexTRAK-S performs with the same consistent plasma treatment uniformity, efficiency, and short cycle times as the smaller version.
Low viscosity, one part cyanoacrylate is non-toxic and meets ISO 10993-5 specifications
Monday, August 25, 2014This single component ethyl cyanoacrylate cures rapidly depending upon the atmospheric humidity—the higher the level, the faster the rate of cure. There is no mixing or heating required for curing. Since the cure is usually fast, only minimal contact pressure is required for bonding. MB250NT will typically set up within 10-40 seconds. It has a low viscosity of 100-110 cps.
Electrolube encapsulation resin meets tough specifications for wind turbine electrical installation
Wednesday, August 20, 2014Wind turbines present some of the most challenging environments for electrical and electronic installations. Often subject to extremely high humidity levels, high temperatures and vibration, these installations require specialised protection measures above and beyond what would normally be needed under less aggressive conditions.

Ersa’s i-CON PICO offers slim line format
Tuesday, August 19, 2014Kurtz Ersa North America, a supplier of electronics production equipment, offers the i-CON PICO as part of its i-CON family of products. The i-CON PICO is the ideal professional entry-level station in the Slim Line format with a footprint of only 145 x 80 mm (5,7 x 3,1").
The 80W soldering station uses the ultra-light i-tool PICO, available with more than 40 different i-Tip soldering tips of 102 series.
AI Technology (AIT) introduces novel high temperature large area underfill with proven stress absorption
Thursday, August 14, 2014AI Technology, Inc. (AIT) is proud to introduce a new generation of Flip-Chip Underfill solution that combines a High Tg of >240°C and novel stress absorbing capabilities to allow long-term reliability of large area flip-chip devices. MC7885-UFS is a proven unique underfill adhesive that fills under large area chips and cures without voids and internal stresses for ultimate reliability.
World's best flip chip underfill: SMT 158 series
Wednesday, August 13, 2014YINCAE Advanced Materials, LLC is pleased to announce the availability of a series of new underfill products that enables fast flowing, excellent reliability, and use on several different applications. This combination of characteristics enables SMT 158 series to be the world's best flip chip underfill.

 
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