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  • MIT-led research team aims to cut waste, greenhouse gas emissions associated with electronics

    Screenshot 2024-05-24 at 10.13.04

    The microchips behind everything from smart phones to medical imaging can be traced to about 500 Megatonnes of CO2-eq lifetime emissions in 2021, and every year the world produces more than 50 million tons of electronic waste. Further, the huge data centers necessary for complex computations like on-demand video, are growing and will require ten percent of the world’s electricity by 2030.

    “This is neither scalable nor sustainable, and cannot continue,” says Dr. Anuradha Murthy Agarwal, a principal research scientist at MIT’s Materials Research Laboratory.

    https://youtube.com/watch?v=RxmYdkFaxvo%3Fcolor%3Dwhite

    MIT’s Dr. Anuradha Murthy Agarwal describes FUTUR-IC, which performs microchip materials and device research for electronic-photonic integration towards a high bandwidth, low latency environmentally sustainable solution developed by a workforce trained in green-STEM innovation. It has received new Phase 2 funding from the NSF. Credit: FUTUR-IC, a new Global Alliance for Sustainable Microchip Manufacturing

    To that end, Agarwal and colleagues have formed FUTUR-IC, a new Global Alliance for Sustainable Microchip Manufacturing, to perform research that will create novel high performance electronic-photonic integration technology while targeting circularity, with a STEM-trained green innovative workforce. FUTUR-IC is the result of funding from the National Science Foundation (NSF) Convergence Accelerator’s Track I: Sustainable Materials for Global Challenges, headed by Program Director, Dr. Linda Molnar. It is aimed at solving especially compelling societal or scientific challenges to sustainability using a multi-disciplinary approach that both captures the full product life cycle through the advancement of fundamental science, and uses circular design to create environmental and economically sustainable materials and products.

    On December 15, 2023 the NSF Convergence Accelerator announced that FUTUR-IC has advanced to Phase 2 of the program. The new funding—five million dollars over three years—will support ongoing research across the three dimensions of technology-ecology-workforce conceived during Phase 1.

    FUTUR-IC, a reference to the future of integrated circuits, brings together stakeholders from industry, academia, and government. The market for microelectronics in the next ten years is predicted to be on the order of a trillion dollars, but most of the manufacturing supply chain for the industry resides only in limited geographical pockets around the world. FUTUR-IC aims to diversify and strengthen the supply chain for manufacturing and packaging of electronics and photonics.

    The alliance already has 26 collaborators, and is growing. Current external collaborators include the International Electronics Manufacturing Initiative (iNEMI)Tyndall National InstituteSEMIHewlett Packard EnterpriseIntel, and the Rochester Institute of Technology.

    Agarwal leads FUTUR-IC in close collaboration with others, including, from MIT, Lionel Kimerling, the Thomas Lord Professor of Materials Science and Engineering, co-PI; Elsa Olivetti, the Jerry McAfee Professor in Engineering, co-PI; Randolph Kirchain, principal research scientist, co-PI; Greg Norris, director of MIT’s Sustainability and Health Initiative for NetPositive Enterprise (SHINE), and Elizabeth Unger, research scientist. All are affiliated with the Materials Research Laboratory. They are joined by Samuel Serna, MIT visiting professor and assistant professor of physics at Bridgewater State University, a co-PI.

    Other key personnel include Assistant Professor Aristide Gumyusenge, Sajan Saini, education director, and Pradnya Nagarkar, technical program manager, all of MIT’s Department of Materials Science and Engineering; Timothy Swager, professor in the Department of Chemistry; Peter O’Brien, professor from Tyndall National Institute; and Shekhar Chandrashekhar, CEO of iNEMI.

    Technology, Ecology, and Workforce

    FUTUR-IC is organized into three dimensions—Technology, Ecology, and Workforce—that were defined with the help of feedback from some 140 stakeholders during Phase 1 of this NSF Convergence Accelerator program.

    Says MIT’s Kimerling, who is also director of MIT’s Materials Research Laboratory and co-director of the MIT Microphotonics Center: “We have become accustomed to the benefits forged by the exponential growth of microelectronic technology performance and market size. The ecological impact of this growth in terms of materials use, energy consumption and end-of-life disposal has begun to push back against this progress. We believe that concurrently engineered solutions for these dimensions will build a common learning curve to power the next 40 years of progress in the semiconductor industry.”

    He continued, “Dr. Agarwal has uniquely created the vision and pathway to maintain technology growth using electronic-photonic integration, and reduce ecological footprint with lower energy consumption, use of legacy nodes for photonics, and easier access to repair and disassembly due to longer interconnects enabling spatially separable components. Her energy, collegiality, and leading-edge contributions to the science of chipmaking have combined to build the research teams that underlie the FUTUR-IC Global Alliance for Sustainable Microchip Manufacturing. The Alliance is fortunate to have her leadership and her vision to guide Technology, Ecology and Workforce into the next stage for the industry.”

    FUTUR-IC has already initiated research in all three dimensions. Examples include:

    Technology/Profits:

    One example of work underway in this dimension is integrating electronics with photonics, as well as other performance-enhancing sustainable technology innovations. “The emerging near-term sustainable solution is photonics for communications and electronics for computation, and hence FUTUR-IC is investigating innovation in sustainable electronic-photonic packaging,” says Kimerling, co-lead for the technology dimension.

    Technology co-lead Serna reiterates these benefits of photonics: “We expect the integration of electronics and photonics to revolutionize microchip manufacturing, enhancing efficiency, reducing energy consumption, and paving the way for unprecedented advances in computing speed and data-processing capabilities.”

    Says Agarwal, “The current microchip scaling trend requires judicious use of mixed technology chiplets for higher speed and increased functionality within a standard electronic-photonic package platform. FUTUR-IC is enabling this foundational platform to achieve a package I/O target of 1.6 Pb/s data rates using chip-to-chip evanescence and micro-reflection within photonic interconnects. This form of electronic-photonic integration enables modularity for easier disassembly and helps meet ecology constraints of affordable and accessible repair of microchips in systems, decreasing energy consumption, and cutting waste and greenhouse gas emissions associated with electronics by 50 percent every 10 years.”

    Additionally, in conjunction with partners, FUTUR-IC will develop novel materials and designs that enable one to reduce, reuse, recycle, repair and upgrade microchip-containing systems.

    FUTUR-IC will also detect and minimize the use of toxic forever chemicals, per- and polyfluoroalkyl substances (PFAS) in the microchip manufacturing ecosystem. “Enabling the detection, capture, and remediation of PFAS, as well as the development of PFAS-free polymers for microchip processing and electronic-photonic packaging within the semiconductor industry, will be an important contribution to environmental sustainability in microchips as well as to other industries needing alternatives,” says Gumyusenge, who will partner with Swager on this effort, in collaboration with IBM’s PFACTS effort, also funded by NSF Convergence Accelerator’s Track I program.

    Ecology/Planet:

    An example of work underway in the ecology dimension is the development of a universal quantitative tool across the semiconductor supply chain to help industries assess the environmental impact of their design and operational decisions. Kirchain, Norris, and Olivetti are the co-leads for this work. “The microchip industry must have transparent and open Life Cycle Assessment (LCA) models and data, which are being developed by FUTUR-IC,” says Norris. SHINE postdoctoral researcher Dr. Ajay Gupta, who is developing the universal LCA, is a core member of the ecology dimension team.

    “While integrated circuits already pervade every aspect of modern life, their production only continues to expand. Given that scale and scope, it is critical for the industry to lead in the transition to sustainable manufacture and use,” says Kirchain, who is also co-director of the Concrete Sustainability Hub at MIT.

    The MIT Climate and Sustainability Consortium (MCSC) will collaborate with FUTUR-IC. “The program provides the opportunity to contribute to effective methods for life-cycle assessment for chip manufacturing with inputs from companies along the supply chain from wafers to data centers. By working closely with the technology team, we will support metrics to monitor progress toward more sustainable design and processing in semiconductor innovation,” says Olivetti, co-director of the MCSC.

    Agarwal notes that sustainable solutions developed through FUTUR-IC could also be applied to benefit other industries like food/beverage, textiles, and cement. These solutions will minimize the negative effects of climate change, benefitting our planet and life on it.

    Workforce/People:

    Work in this dimension involves the continued development of courses, outreach programs, and other educational efforts focused on the sustainable manufacturing of electronics. “With a workforce that adapts to a practice of continuous upskilling, we can help increase the robustness of the chip-manufacturing supply chain, and validate a new design for a sustainability curriculum,” says Sajan Saini, lead, along with Unger, for the workforce dimension.

    “Solutions for today’s national-scale societal challenges are hard to solve within a single

    discipline. Instead, these challenges require convergence to merge ideas, approaches, and

    technologies from a wide range of diverse sectors, disciplines, and experts,” explains the NSF in its description of the Convergence Accelerator program.

    One other MIT-led team also won Phase 2 NSF Convergence Accelerator grants for projects in the Sustainable Materials for Global Challenges research track. “Topological Electric,” is led by Professor Mingda Li of the Department of Nuclear Science and Engineering.

    More information:
    www.nsf.gov/awardsearch/showAw … storicalAwards=false

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